Re: RunBMC v1.5 Change RFC


Eric Shobe
 



On Mon, Jan 25, 2021 at 7:44 AM Lior Elbaz <lior.albaz@...> wrote:

Hi Eric,

 

Can you elaborate on PFR_RST# signal and what is the different between current BMC_RESET# pin 253 ?

BMC_RESET#  also keep BMC in reset (core reset).


BMC_RESET# is to drive "Chip level reset" or "Power-Up Reset".
PFR_RST# is to drive "SOC level reset" or "BMC CPU Reset Input".  
 

 

what is the usage of BMC_PWRGD(output) ? is it from RunBMC to MB signal ?

Note that currently there is PWRGD signal pin 77 from MB to RunBMC.


BMC_PWRGD output is from RunBMC to MB. 
BMC_PWRGD output that would indicate the power on the RunBMC module is good. 
 

 

Can you elaborate on PLT_RST# signal ? is it BMC power-on-reset signal ?


The PLT_RST# signal rename is to better indicate the usage of this signal with no change in original functionality. 
This is "Platform Reset" instead of "CPU Reset".  This signal will monitor CPU/Platform resets. 

In the spec we have this function defined as "Host CPU Reset Monitor" and will change
this to "Host Platform Reset Monitor"
 

Note that Nuvoton model currently support it on pin 95.

 

Regards,

Lior.

 

From: OCP-HWMgt-Module@OCP-All.groups.io <OCP-HWMgt-Module@OCP-All.groups.io> On Behalf Of Eric Shobe via groups.io
Sent: Monday, January 25, 2021 08:02
To: OCP-HWMgt-Module@OCP-All.groups.io
Subject: [OCP-HWMgt-Module] RunBMC v1.5 Change RFC

 


Hi all,

 

I want to welcome everyone to comment on the following proposed changes for RunBMC v1.5. 

The change requests we have received so far are the following:

 

  •  Add Display Port Functionality [need to decide]

 

From RunBMC pins perspective the VGA pins could be reused for Display Port assuming 2 Lanes, Aux Lane and presence detect there are exactly 7 pins needed. 

The following high level changes would be needed to support this. 

 

1. Add filtering for TX pairs 

2. Add HW straps on daughter board to support dual function for TX pairs
3. Add HW straps for AUX diff pair
4. Add HW strap HPD presence
5. Describe filtering/circuitry needed near DP connector on mobo

 

The pinout proposal is here. 

 

  • eMMC functionality [proposed]

If the specification was to be changed to say "eMMC may be added on the RunBMC module", we don't see that as changing anything.  Today, with the specification, anyone who wants to design a RunBMC module can choose to add eMMC or not.

If designs add eMMC over the connector some will loose 4 pairs of I2C pins (I2C10 to I2C13).

  • BMC SD interface. Add SD interface

Screen Shot 2021-01-24 at 9.43.18 PM.png

 

  • Add PWRGB signal. [proposed]

We will add pin95(GPIO63) to be BMC_PWRGD(output)

 

95 BMC_PWRGD_GPIO63  

 

  • Add PFR Reset Signal [proposed]

We will add one more reset input pin on pin93(GPIO61) as PFR_RST#

93 PFR_RST#_GPIO61 

CPLD/circuitry can use the signal to let BMC in reset state.

  • Change pin name from CPU_RST# to PLT_RST# [proposed]
  • I3C [proposed]

Add the I3C3-6 pin definition below. (The I3C 1.0/1.2V signals
need to co-lay with following GF pins.) If user need the I3C 1.0V/1.2V function, please add
a level shift logic IC at MB side.

 

Screen Shot 2021-01-24 at 9.57.28 PM.png

 

Thanks,

Eric


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